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| PS-AT7909E revision A (R) MICROCIRCUIT, DIGITAL, CMOS, MONOLITHIC SILICON SINGLE CHIP TELEMETRY AND TELECOMMAND AT7909E Revision A Written by V. Briot / E. Vannier Approved by C. Ferre Date 21/05/2007 PS-AT7909E Rev A DOCUMENTATION CHANGE NOTICE Date of update Revision letter modifications Sheet 2 / 20 PS-AT7909E Rev A 1 1.1 1.2 1.3 1.4 1.5 1.6 SUMMARY GENERAL ...................................................................................................................................... 4 Scope................................................................................................................................................. 4 Identification...................................................................................................................................... 4 Absolute maximum ratings................................................................................................................ 4 Recommended operating conditions. ................................................................................................ 4 Radiation features.............................................................................................................................. 4 Handling precautions......................................................................................................................... 4 2 3 3.1 3.1.1 3.1.2 3.1.3 3.2 3.2.1 3.2.2 3.2.3 3.3 3.4 3.4.1 3.4.2 3.5 3.5.1 3.5.2 3.5.3 APPLICABLE DOCUMENTS..................................................................................................... 4 REQUIREMENTS......................................................................................................................... 4 Design, construction, and physical dimensions. ................................................................................. 4 Package type....................................................................................................................................... 5 Terminal connections............................................................................................................................ 5 Block diagram...................................................................................................................................... 5 Marking.............................................................................................................................................. 5 Lead Identification................................................................................................................................. 5 Component Number.............................................................................................................................. 5 Traceability Information ......................................................................................................................... 5 Electrical characteristics.................................................................................................................... 5 Burn-in test......................................................................................................................................... 5 Electrical circuit ................................................................................................................................... 5 Parameters drift value ........................................................................................................................... 5 Environmental and Endurance Tests.................................................................................................. 6 Electrical Circuit for Operating LifeTest ................................................................................................... 6 Electrical Measurements at Completion of Environmental and endurance tests .......................................... 6 Conditions for Operating LifeTest............................................................................................................ 6 4 4.1 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.5 QUALITY ASSURANCE PROVISIONS.................................................................................... 6 Wafer lot acceptance test .................................................................................................................. 6 Sampling and inspection. .................................................................................................................. 6 Screening. ......................................................................................................................................... 6 Quality conformance inspection ........................................................................................................ 6 Group A inspection. .............................................................................................................................. 6 Group C inspection. .............................................................................................................................. 6 Group D inspection. .............................................................................................................................. 7 Delta measurements.......................................................................................................................... 7 5 5.1 PACKAGING ................................................................................................................................. 7 Packaging requirements.................................................................................................................... 7 FIGURES FIGURE 1. Case outline. .................................................................................................................................................................................10 FIGURE 2. Terminal connections.................................................................................................................................................................11 FIGURE 3. Block diagram ..............................................................................................................................................................................13 FIGURE 4. Electrical circuit for power burn-in and operating life test. ....................................................................................................14 TABLES TABLE 1. Electrical Parameters ......................................................................................................................................................................8 TABLE 2. Parameter drift values .....................................................................................................................................................................9 Sheet 3 / 20 PS-AT7909E Rev A 1 GENERAL 1.1 Scope This specification details the ratings, physical and electrical characteristics, tests and inspection data of the Single Chip telemetry and Telecommand named AT7909E. It also defines the specific requirement for space and military applications with high reliability. 1.2 Identification Description AT7909EKA-MQ AT7909EKA-SV Case Flat pack 256 leads Flat pack 256 leads Application Military application Space application 1.3 Absolute maximum ratings Supply voltage range (V DD) ............................................. -0.5V to 4V dc Input voltage range (V IN) ................................................. -0.5V dc to 6V dc Input current per power pin ............................................. +/- 60 mA Input current par signal pin ............................................. +/- 10 mA Storage temperature ...................................................... -65C to 150C Maximum junction temperature (TJ) ................................. 175C Lead temperature (soldering @ 1/16 in, 10 s)................... 300C Thermal resistance junction to case (Rjc) ....................... 3.5 K/W 1.4 Recommended operating conditions. Supply voltage range (V DD) ............................................. 3 V dc to 3.6 V dc Ambient operating temperature (TA) ................................ -55C to 125C Storage temperature ...................................................... 30C, 20 to 65% RH, dust free, original packing 1.5 Radiation features Tested up to a total dose (dose rate 0.1 rad/s) ................. 100 kRads (Si) 1.6 Handling precautions These components are susceptible to damage by electrostatic discharge. Therefore, suitable precautions shall be employed for protection during all phases of manufacturing, testing, shipment and any handling. ESD............................................................................. >4000 V 2 APPLICABLE DOCUMENTS MIL-PRF-38535 ...................................... Integrated Circuits, Manufacturing, General Specification for. MIL-STD-883 ........................................ Test Method Standard Microcircuits. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. 3 3.1 herein. REQUIREMENTS Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and Sheet 4 / 20 PS-AT7909E Rev A 3.1.1 Package type. The package shall be a flat pack, 256 leads ( figure1). The case shall be hermetically sealed and have a ceramic body. Lid shall be connected to ground. 3.1.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.1.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2 Marking Each component shall be marked in respect of : (a) Lead Identification (b) Component Number (c) Traceability Information (d) Manufacturer's Component Number 3.2.1 Lead Identification An index shall be located at the top of the package in the position defined in Figure 1. 3.2.2 follows: AT7909EKA-XX Component Number Each component shall bear the component number which shall be constituted and marked as Product identification Package (KA = flat pack 256) Level (MQ=high reliability - SV=space application) 3.2.3 Traceability Information Each component shall be marked in respect of traceability information: lot number and date code. 3.3 Electrical characteristics The parameters to be measured with respect of electrical characteristics are scheduled in Table 1. The measurements shall be performed at Tamb=25 3C, Thigh=125 (+0/-5)C and T = -55 (+5/-0)C low respectively. 3.4 3.4.1 Burn-in test Electrical circuit Circuit for use in performing the power burn-in is shown in figure 4, in accordance with the intent specified in test method 1015 of MIL-STD-883. Sheet 5 / 20 PS-AT7909E Rev A 3.4.2 Parameters drift value For space application, the parameter drift values applicable to burn-in are specified in Table 2 of this specification. Unless otherwise stated, measurements shall be performed at + 25 + 3 C. The parameter drift values (), applicable to the parameters scheduled, shall not be exceeded. In addition to these drift value requirements, the appropriate limit value specified for a given parameter in Table 1 shall not be exceeded. . 3.5 3.5.1 Environmental and Endurance Tests Electrical Circuit for Operating LifeTest The circuit for operating life testing shall be as specified for power burn in (figure 4). 3.5.2 Electrical Measurements at Completion of Environmental and endurance tests The parameters to be measured are scheduled in Table 1. Unless otherwise stated, the measurements shall be performed at tamb = 25+3C. 3.5.3 Conditions for Operating LifeTest The conditions for operating life testing shall be as specified for power burn in. 4 4.1 5007. QUALITY ASSURANCE PROVISIONS Wafer lot acceptance test For space application, Wafer Lot Acceptance shall be performed according to mil-std-883 method 4.2 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535. 4.3 Screening. Screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection * The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in accordance with MIL-PRF-38535. * Additional screening for space application devices shall be as specified in MIL-PRF-38535, appendix B. 4.4 Quality conformance inspection Qualification inspection for high reliability and space applications devices shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections. 4.4.1 Group A inspection. * Tests shall be as specified in table 1 herein. * Subgroups 5 and 6 of table I of method 5005 of MIL STD 883 shall be omitted. * Subgroups 7 and 8 of table I of method 5005 of MIL STD 883 shall include verifying the functionality of the device. Sheet 6 / 20 PS-AT7909E Rev A * O/V (latch up) tests shall be measured only for the initial qualification and after any process or design changes which may affect the performance of the device. * Capacitance measurement shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is five devices with no failure, and all input and output terminals tested. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table 1 herein. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table 1 herein. 4.5 Delta measurements Delta measurements, as specified in table 2, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table 2. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after life test perform final electrical parameter tests, subgroups 1, 7 and 9. 5 PACKAGING 5.1 Packaging requirements The requirements for packaging shall be in accordance with MIL-PRF-38535. Sheet 7 / 20 PS-AT7909E Rev A TABLE 1. Electrical Parameters Test metho d MilStd883 Conditions -55C TC +125C +3 V VDD +3.6 V unless otherwise specified Limits Min Max Unit Test Symbol High level input voltage Low level input voltage Threshold Schmitt trigger input voltage Threshold Schmitt trigger input voltage Hysteresis High level output voltage Low level output voltage Low level input current High level input current High level input current, pull-down input Output leakage current Output leakage current, pull-down output Input pin capacitance I/O pin capacitance Standby supply current for array Operating current for array Setup time SpwIfSel to SysClk Setup time MemD[15:0] to SysClk MemDcc[5:0] to SysClk Propagation Delay SysClk to MemA[23:0] Propagation Delay SysClk to MemD[15:0] SysClk to MemDcc[5:0] VIH VIL VT+ VTVHYS VOH VOL IIL IIH IIHP IOZ IOZHP CIN CIO IDDSBA IDDOP Ts1 3013 3013 3013 3013 3006 3007 3009 3010 3010 3012 3012 3005 3005 3003 VDD=3.6V VDD=3.0V Note 1 Note 1 Note 1 2.0 0.8 1.40 0.99 0.37 2.4 0.4 2.08 1.51 V V V V V V V A A A 70 1 70 3 7 4.5 80 0 A A A pF pF mA mA ns Vin=GND, VDD=VDD(max) Vin=VDD=VDD(max) Vin=VDD=VDD(max) Outputs disabled, GND < Vout < VDD Outputs disabled, Vout = VDD Note 1 Note 1 Static mode VDD=3.6V VDD = 3.6 V Note 2 VDD = 3.6 V Note 2 -1 -1 5 -1 5 1 1 Ts2 3003 0 ns Tp1 3003 VDD = 3.6 V Note 2 30 ns Tp2 3003 VDD = 3.6 V Note 2 42 ns Sheet 8 / 20 PS-AT7909E Rev A Propagation Delay SysClk to SpwDOut? Propagation Delay SysClk to SpwDOut? Propagation Delay SysClk to SpwSOut? Propagation Delay SysClk to SpwSOut? Propagation Delay SysClk to SeqIrq Tp3 Tp4 Tp5 Tp6 Tp7 3003 3003 3003 3003 3003 VDD = 3.6 V Note 2 VDD = 3.6 V Note 2 VDD = 3.6 V Note 2 VDD = 3.6 V Note 2 VDD = 3.6 V Note 2 41 34 41 34 53 ns ns ns ns ns Notes : 1/ Guaranteed but not tested 2/ Test conditions: Tester load 80 pF, VIL = 0V, VIH = VDD, Input signals dynamic characteristics: tr,tf < 10ns, Threshold voltages: VOL = VOH = VDD/2 TABLE 2. Parameter drift values Test method Mil-Std883 3009 3010 3005 3007 3006 Test Symbol Conditions Drift limits Unit Low Level Input Current High Level Input Current Output Leakage Low Current Output Leakage High Current Supply Current Standby for Array Low Level Output Voltage BUF2 High Level Output Voltage BUF2 IIL IIH IOZL IOZH IDDSBA VOL VOH as per Table 1 as per Table 1 as per Table 1 as per Table 1 as per Table 1 as per Table 1 as per Table 1 0.1 0.1 0.1 0.1 430 100 100 A A A A A mV mV Note : the above parameter shall be recorded before and after burn-in and life test to determine the delta. Sheet 9 / 20 PS-AT7909E Rev A FIGURE 1. Case outline. The package is a 256-pin MQFP with 0.02 mil pin spacing and lid connected to ground. A A1 A2 C D/E D1/E1 e f L N1 N2 mm 2.41 3.18 2.06 2.56 0.05 0.36 0.10 0.20 53.23 55.74 36.83 37.34 0.508 BSC 0.15 0.25 8.20 9.20 64 64 inch 0.095 0.125 0.081 0.101 0.002 0.014 0.004 0.008 2.095 2.195 1.450 1.470 0.020 BSC 0.006 0.010 0.323 0.362 Sheet 10 / 20 PS-AT7909E Rev A FIGURE 2. Terminal connections. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Signal name Vss[8] MemD[12] MemD[11] MemD[10] Vdd[8] MemD[9] Vss[18] Vdd[18] MemD[8] MemD[7] MemD[6] MemD[5] MemD[4] MemD[3] Vss[7] TestSignalIn[6] MemD[2] MemD[1] Vdd[7] MemD[0] MemCs3N Vss[6] PdecTcPrior MemCs2N MemCs0N Vdd[6] MemOEN MemWEN Vss[5] MemA[19] MemA[18] Vdd[5] MemA[17] MemA[16] Vss[4] MemA[15] MemA[14] Vdd[4] MemA[13] MemA[12] MemA[11] Vss[3] MemA[10] Vdd[3] MemA[9] MemA[8] MemA[7] Vss[2] Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 Signal name Vdd[2] MemA[4] MemA[3] MemA[2] Vss[1] MemA[1] Vss[19] Vdd[19] MemA[0] Vdd[1] MemSize16 TestSignalIn[1] TestMode TestSE JtagTdo JtagTdi JtagTms JtagTRstN JtagTck PdecMapGenA[5] Vss[20] Vdd[20] PdecMapGenA[4] PdecMapGenA[3] PdecMapGenA[2] PdecMapGenA[1] PdecMapGenA[0] Vss[17] PdecMapDtr[5] PdecMapDsr[5] PdecMapDtr[4] PdecMapDsr[4] Vdd[17] PdecMapDtr[3] PdecMapDsr[3] PdecMapDtr[2] PdecMapDsr[2] PdecMapDtr[1] PdecMapDsr[1] PdecMapDtrG PdecMapDsrG PdecMapData PdecMapClk PdecRfAvN[3] PdecRfAvN[2] Vss[16] PdecMapAdt PdecRfAvN[1] Pin 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 Signal name TestSignalIn[2] TestSignalIn[3] TmClk1 TmClk2 SysClk PoResetN PdecTcIn[5] PdecTcClk[5] PdecTcAct[5] PdecTcIn[4] PdecTcClk[4] PdecTcAct[4] PdecTcIn[3] PdecTcClk[3] PdecTcAct[3] PdecTcIn[2] PdecTcClk[2] Vss[15] PdecTcAct[2] PdecTcIn[1] Vss[21] Vdd[21] PdecTcClk[1] Vdd[15] PdecTcAct[1] PdecTcIn[0] PdecTcClk[0] PdecTcAct[0] PdecClcwD[1] PdecClcwSamp[1] PdecClcwClk[1] PdecMapSwitch TmeSValid[H] PdecAuEnable Vss[22] Vdd[22] TmeSIn[H] TmeSClk[H] TmeSRdy[H] TmeSValid[G] TestSignalIn[4] TmeSIn[G] TmeSClk[G] TmeSRdy[G] TmeSValid[F] TmeSIn[F] TmeSRdy[F] TmeSClk[F] Pin 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 Signal name PdecClcwSamp[0] TmeSIn[E] PdecClcwClk[0] TmeSClk[E] TmeSRdy[E] TmeSRdy[D] TmeSValid[D] TmeSIn[D] TmeSClk[D] Vss[14] TmeSRdy[C] TmeSValid[C] TmeSIn[C] TmeSClk[C] ExtCpduIfAbort TmeSValid[B] ExtCpduIfValid ExtCpduIfRdy ExtCpduIfData TmeSIn[B] ExtCpduIfClk TmeSClk[B] TmeSRdy[B] TmeSRdy[A] TmeSValid[A] TmeSIn[A] TmeSClk[A] TmeEnable Vdd[14] TmeTimeStrb TmeUnEncSync TmeUnEncClk Vss[13] TmeUnEncOut Vss[23] Vdd[23] Vdd[13] TmeEncOut TmeEncClk TmeEncIOut TmeEncQOut TmeEncIQClk Vss[12] TmeClcwSamp TmeClcwClk TmeClcwD[3] TmeClcwD[2] TmeClcwD[1] Sheet 11 / 20 PS-AT7909E Rev A Pin 49 50 201 202 203 204 205 206 207 208 209 210 211 212 213 214 Signal name MemA[6] MemA[5] TmeClcwD[0] ReInit CiInClk CiInData Vdd[12] CiInRdy CiInValid CiOutRdy CiOutClk CiOutData Vss[11] CiOutValid TestSignalOut[1] SpwSInB Pin 99 100 215 216 217 218 219 220 221 222 223 224 225 226 227 228 Signal name Vdd[16] PdecRfAvN[0] SpwDInB SpwIfSel SpwSInA SpwDInA SpwClk Vdd[11] SpwSOut SpwDOut CpdmClkAlive CpdmClkToggle CpdmClk Vss[10] CpdmSer CpdmArmN Pin 149 150 229 230 231 232 233 234 235 236 237 238 239 240 241 242 Signal name TmeSValid[E] PdecClcwD[0] CpdmStrb CselRmOn CselStatusIn[2] CselStatusIn[1] CselStatusIn[0] Vdd[10] Irq CselStatusOut[2] CselStatusOut[1] CselStatusOut[0] TestSignalOut[2] TestSignalOut[3] Vss[9] TestSignalOut[4] Pin 199 200 243 244 245 246 247 248 249 250 251 252 253 254 255 256 Signal name Vss[24] Vdd[24] TestSignalOut[5] TestSignalIn[5] MemDcc[5] MemDcc[4] Vdd[9] MemDcc[3] Vss[25] Vdd[25] MemDcc[2] MemDcc[1] MemDcc[0] MemD[15] MemD[14] MemD[13] Signals pins are described in AT7909E datasheet. Sheet 12 / 20 PS-AT7909E Rev A FIGURE 3. Block diagram TestSE Test TestMode TestSignalIn [1:5] TestSignalOut [1:5] Internal Bus PdecMapAdt PdecMapClk PdecMapData PdecMapDtrG PdecMapDsrG JtagTck JtagTdi JTAG Interface JtagTms JtagTRstN JtagTdo PdecMapGenA [5:0] PacketWire Multiplexed Access Point (MAP) Internal Scan Controller JTAG TAP Controller PdecMapDsr [1:5] PdecMapDtr [1:5] Packet Telecommand Decoder (PDEC3) PdecTcAct [0:5] PdecTcClk [0:5] PdecTcIn [0:5] Telecommand Input PdecRfAvN [0:3] SysClk Clocks SpwClk TmClk1 TmClk2 Clock & Reset SysClk SpwClk TmClk PdecClcwClk [0:1] PdecClcwSamp [0:1] PdecClcwD [0:1] CLCW Output Power-on Reset PoResetN MAP Address 0 MAP Address 6 PdecMapSwitch PdecTcPrior PdecAuEnable Configuration Restart configuration Interrupt ReInit Configuration Irq TcOnly TC request Configuration MemSize16 CselStatusIn [2:0] PM request Command Pulse Selector (CSEL) CselStatusOut [2:0] Command Status MemD [15:0] MemDcc [5:0] MemA [19:0] Asynchronous Memory Interface MemOEN MemWEN PromCsN ExtRecLacN RamCsN CPDM request RM/TC request CselRmOn Configuration Memory Interface CpdmStrb Command Pulse Distribution (CPDM) CpdmArmN CpdmSer CpdmClk Command Pulse Output ExtCpduIfClk PacketWire Command Pulse Input ExtCpduIfValid ExtCpduIfRdy ExtCpduIfData ExtCpduIfAbort External CPDU Interface (ExtCpduIf) CpdmClkAlive CpdmClkToggle Clock Alive Detection TmeClcwClk TmeClcwSamp TmeClcwD [1:4] CLCW Input Configuration SpwIfSel SpwClk SpwDInA TmClk TmeUnEncClk TmeUnEncOut SpaceWire Control & Data Input/Output (Nominal & Redundant) SpwSInA SpwDInB SpwSInB SpaceWire (SPW) Packet Telemetry Encoder (TME) TmeUnEncSync TmeEncClk TmeEncOut Telemetry Output SpwDOut SpwSOut VRC 0-6 VC A-G TmeEncIQClk TmeEncIOut TmeEncQOut CiInClk PacketWire Control Input CiInValid CiInData CiInRdy VRC 7 TmeTimeStrb Time strobe Control Interface (CI) TmeSClk [A:H] TmeSIn [A:H] TmeSValid [A:H] TmeSRdy [A:H] PacketWire Data Input CiOutClk PacketWire Control Output CiOutValid CiOutData CiOutRdy TmeEnable Configuration Legend: Buses are numbered [high:low]. Separate signals are numbered [low:high] Sheet 13 / 20 PS-AT7909E Rev A FIGURE 4. Electrical circuit for power burn-in and operating life test. Characteristics Ambient Temperature Positive Supply Voltage Negative Supply Voltage Symbol Tamb VCC GND Conditions 125 (+0/-5) 3.7V (+0.1 /-0.1) 0 Unit C V V Forcing inputs: S1 = 1.65 MHz S3 = 412.50 KHz S6 = 51.56 KHz S9 = 100.70 Hz S10 = 50.30 Hz All signals are issued from the same clock and there is no overlap on timings - Inputs must be wired to a defined level: VCC, GND or Driver Signals - Connecting an input to VCC 'or' GND must always be through a 2.2k serie resistor Forcing outputs: - Output must be wired to VCC and GND - Connecting an output to VCC 'and' GND must always be through two 5.6k series resistors. Forcing inputs/outputs: - I/O must be wired as Input or Output following previous definition. - By default I/O are considered as Input Pin Number 1 2 3 4 5 6 7 7 7 8 8 8 9 10 11 12 13 14 15 16 Pad numb er 1 2 3 4 5 6 515 525 536 274 264 287 7 8 9 10 11 12 13 14 Signal Model Type Pull type Resistance Wired VSB28 MemD_12_ MemD_11_ MemD_10_ VDB26 MemD_9_ VSA27 VSA24 VSA19 VDA22 VDA25 VDA16 MemD_8_ MemD_7_ MemD_6_ MemD_5_ MemD_4_ MemD_3_ VSB23 PdecTcDyn PVSSB PICV:PO33V:PRD6 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PVDDVB PICV:PO33V:PRD6 PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PICV:PO33V:PRD6 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PVSSB PICV:PRD6V VSB VI/O VI/O VI/O VDB VI/O VSA VSA VSA VDA VDA VDA VI/O VI/O VI/O VI/O VI/O VI/O VSB I PD PD PD PD PD PD PD PD PD PD PD 0 2.2k 2.2k 2.2k 0 2.2k 0 0 0 0 0 0 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 0 2.2k GND GND GND GND VCC GND GND GND GND VCC VCC VCC GND GND GND GND GND GND GND S6 Sheet 14 / 20 PS-AT7909E Rev A 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 57 57 58 58 58 59 60 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 570 560 547 309 318 297 55 56 MemD_2_ MemD_1_ VDB21 MemD_0_ MemCSN_3_ VSB20 PdecTcPrior MemCSN_2_ MemCSN_0_ VDB18 MemOEN MemWEN VSB17 MemA_19_ MemA_18_ VDB15 MemA_17_ MemA_16_ VSB14 MemA_15_ MemA_14_ VDB12 MemA_13_ MemA_12_ MemA_11_ VSB10 MemA_10_ VDB9 MemA_9_ MemA_8_ MemA_7_ VSB7 MemA_6_ MemA_5_ VDB6 MemA_4_ MemA_3_ MemA_2_ VSB4 MemA_1_ VSA3 VSA8 VSA13 VDA5 VDA1 VDA11 MemA_0_ VDB2 PICV:PO33V:PRD6 PICV:PO33V:PRD6 PVDDVB PICV:PO33V:PRD6 PO66VF PVSSB PICV:PRD6V PO66VF PO66VF PVDDVB PO66VF PO66VF PVSSB PO66VF PO66VF PVDDVB PO66VF PO66VF PVSSB PO66VF PO66VF PVDDVB PO66VF PO66VF PO66VF PVSSB PO66VF PVDDVB PO66VF PO66VF PO66VF PVSSB PO66VF PO66VF PVDDVB PO66VF PO66VF PO66VF PVSSB PO66VF PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PO66VF PVDDVB VI/O VI/O VDB VI/O O/Z VSB I O/Z O/Z VDB O/Z O/Z VSB O/Z O/Z VDB O/Z O/Z VSB O/Z O/Z VDB O/Z O/Z O/Z VSB O/Z VDB O/Z O/Z O/Z VSB O/Z O/Z VDB O/Z O/Z O/Z VSB O/Z VSA VSA VSA VDA VDA VDA O/Z VDB PD PD PD PD 2.2k 2.2k 0 2.2k 5.6k 0 2.2k 5.6k 5.6k 0 5.6k 5.6k 0 5.6k 5.6k 0 5.6k 5.6k 0 5.6k 5.6k 0 5.6k 5.6k 5.6k 0 5.6k 0 5.6k 5.6k 5.6k 0 5.6k 5.6k 0 5.6k 5.6k 5.6k 0 5.6k 0 0 0 0 0 0 5.6k 0 GND GND VCC GND VCC-GND GND S6 VCC-GND VCC-GND VCC VCC-GND VCC-GND GND VCC-GND VCC-GND VCC VCC-GND VCC-GND GND VCC-GND VCC-GND VCC VCC-GND VCC-GND VCC-GND GND VCC-GND VCC VCC-GND VCC-GND VCC-GND GND VCC-GND VCC-GND VCC VCC-GND VCC-GND VCC-GND GND VCC-GND GND GND GND VCC VCC VCC VCC-GND VCC Sheet 15 / 20 PS-AT7909E Rev A 61 62 63 64 65 66 67 68 69 70 71 71 71 72 72 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 57 58 59 60 61 62 63 64 65 66 600 589 579 328 350 337 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 MemSiz ExtdAccess TestMode TestSE JtagTdo JtagTdi JtagTms JtagTRstN JtagTck PdecMapGenA_5_ VSA76 VSA79 VSA82 VDA81 VDA75 VDA78 PdecMapGenA_4_ PdecMapGenA_3_ PdecMapGenA_2_ PdecMapGenA_1_ PdecMapGenA_0_ VSB80 PdecMapDtr_5_ PdecMapDsr_5_ PdecMapDtr_4_ PdecMapDsr_4_ VDB77 PdecMapDtr_3_ PdecMapDsr_3_ PdecMapDtr_2_ PdecMapDsr_2_ PdecMapDtr_1_ PdecMapDsr_1_ PdecMapDtrG PdecMapDsrG PdecMapData PdecMapClk PdecRfAvN_3_ PdecRfAvN_2_ VSB74 PdecMapAdt PdecRfAvN_1_ VDB73 PdecRfAvN_0_ M1553Clk ObtSrcClk TmClk1 TmClk2 PICV PICV PICV:PRD6V PICV:PRD6V PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PICV:PRD6V PO22V PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PO22V PO22V PO22V PO22V PO22V PVSSB PICV:PRD6V PO22V PICV:PRD6V PO22V PVDDVB PICV:PRD6V PO22V PICV:PRD6V PO22V PICV:PRD6V PO22V PICV:PRD6V PO22V PO22V PO33V PICSV:PRD6V PICSV:PRD6V PVSSB PO22V PICSV:PRD6V PVDDVB PICSV:PRD6V PICV PICV PICV PICV I I I I O/Z I I I I O/Z VSA VSA VSA VDA VDA VDA O/Z O/Z O/Z O/Z O/Z VSB I O/Z I O/Z VDB I O/Z I O/Z I O/Z I O/Z O/Z O/Z I I VSB O/Z I VDB I I I I I PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD 2.2k 2.2k 2.2k 2.2k 5.6k 2.2k 2.2k 2.2k 2.2k 5.6k 0 0 0 0 0 0 5.6k 5.6k 5.6k 5.6k 5.6k 0 2.2k 5.6k 2.2k 5.6k 0 2.2k 5.6k 2.2k 5.6k 2.2k 5.6k 2.2k 5.6k 5.6k 5.6k 2.2k 2.2k 0 5.6k 2.2k 0 2.2k 2.2k 2.2k 2.2k 2.2k S6 S6 VCC S10 VCC-GND S6 S6 S10 S1 VCC-GND GND GND GND VCC VCC VCC VCC-GND VCC-GND VCC-GND VCC-GND VCC-GND GND S6 VCC-GND S6 VCC-GND VCC S6 VCC-GND S6 VCC-GND S6 VCC-GND S6 VCC-GND VCC-GND VCC-GND S9 S9 GND VCC-GND S6 VCC S6 S1 S1 S1 S1 Sheet 16 / 20 PS-AT7909E Rev A 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 121 121 122 122 122 123 124 125 126 127 128 129 130 131 132 133 134 135 135 135 136 136 136 137 138 139 140 141 142 143 144 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 624 611 634 361 373 382 115 116 117 118 119 120 121 122 123 124 125 126 664 654 643 415 402 392 127 128 129 130 131 132 133 134 SysClk PoResetN PdecTcIn_5_ PdecTcClk_5_ PdecTcAct_5_ PdecTcIn_4_ PdecTcClk_4_ PdecTcAct_4_ PdecTcIn_3_ PdecTcClk_3_ PdecTcAct_3_ PdecTcIn_2_ PdecTcClk_2_ VSB68 PdecTcAct_2_ PdecTcIn_1_ VSA70 VSA72 VSA67 VDA71 VDA69 VDA65 PdecTcClk_1_ VDB66 PdecTcAct_1_ PdecTcIn_0_ PdecTcClk_0_ PdecTcAct_0_ PdecClcwD_1_ PdecClcwSamp_1_ PdecClcwClk_1_ PdecMapSwitch TmeSValidNom_7_ PdecAuEnable VSA60 VSA62 VSA64 VDA59 VDA61 VDA63 TmeSInNom_7_ TmeSClkNom_7_ TmeSRdy_7_ TmeSValidNom_6_ TmeSInRed_6_ TmeSInNom_6_ TmeSClkNom_6_ TmeSRdy_6_ PICV PICSV PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PVSSB PICSV:PRD6V PICSV:PRD6V PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PICSV:PRD6V PVDDVB PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V PO22V PICSV:PRD6V PICSV:PRD6V PICV:PRD6V PICV:PRD6V PICSV:PRD6V PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PICV:PRD6V PICV:PRD6V PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PICV:PRD6V PO22V I I I I I I I I I I I I I VSB I I VSA VSA VSA VDA VDA VDA I VDB I I I I O/Z I I I I I VSA VSA VSA VDA VDA VDA I I O/Z I I I I O/Z PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 0 2.2k 2.2k 0 0 0 0 0 0 2.2k 0 2.2k 2.2k 2.2k 2.2k 5.6k 2.2k 2.2k 2.2k 2.2k 2.2k 0 0 0 0 0 0 2.2k 2.2k 5.6k 2.2k 2.2k 2.2k 2.2k 5.6k S1 VCC S6 S3 S6 S6 S3 S6 S6 S3 S6 S6 S3 GND S6 S6 GND GND GND VCC VCC VCC S3 VCC S6 S6 S3 S6 VCC-GND S6 S3 S6 S6 S6 GND GND GND VCC VCC VCC S6 S1 VCC-GND S6 S6 S6 S1 VCC-GND Sheet 17 / 20 PS-AT7909E Rev A 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 185 185 186 186 186 187 188 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 688 698 675 446 437 425 175 176 TmeSValidNom_5_ TmeSInNom_5_ TmeSRdy_5_ TmeSClkNom_5_ TmeSValidNom_4_ PdecClcwD_0_ PdecClcwSamp_0_ TmeSInNom_4_ PdecClcwClk_0_ TmeSClkNom_4_ TmeSRdy_4_ TmeSRdy_3_ TmeSValidNom_3_ TmeSInNom_3_ TmeSClkNom_3_ VSB58 TmeSRdy_2_ TmeSValidNom_2_ TmeSInNom_2_ TmeSClkNom_2_ ExtCpduIfAbort TmeSValidNom_1_ ExtCpduIfValid ExtCpduIfRdy ExtCpduIfData TmeSInNom_1_ ExtCpduIfClk TmeSClkNom_1_ TmeSRdy_1_ TmeSRdy_0_ TmeSValidNom_0_ TmeSInNom_0_ TmeSClkNom_0_ TmeEnable VDB54 TmeTimeStrb TmeUnEncSync TmeUnEncClk VSB52 TmeUnEncOut VSA55 VSA51 VSA57 VDA49 VDA53 VDA56 VDB50 TmeEncOut PICV:PRD6V PICV:PRD6V PO22V PICV:PRD6V PICV:PRD6V PO22V PICSV:PRD6V PICV:PRD6V PICSV:PRD6V PICV:PRD6V PO22V PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PVSSB PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PICSV:PRD6V PICV:PRD6V PICSV:PRD6V PO22V PICSV:PRD6V PICV:PRD6V PICSV:PRD6V PICV:PRD6V PO22V PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PICSV:PRD6V PVDDVB PO22V PO33V PO66VF PVSSB PO66VF PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PVDDVB PO66VF I I O/Z I I O/Z I I I I O/Z O/Z I I I VSB O/Z I I I I I I O/Z I I I I O/Z O/Z I I I I VDB O/Z O/Z O/Z VSB O/Z VSA VSA VSA VDA VDA VDA VDB O/Z PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD 2.2k 2.2k 5.6k 2.2k 2.2k 5.6k 2.2k 2.2k 2.2k 2.2k 5.6k 5.6k 2.2k 2.2k 2.2k 0 5.6k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 5.6k 2.2k 2.2k 2.2k 2.2k 5.6k 5.6k 2.2k 2.2k 2.2k 2.2k 0 5.6k 5.6k 5.6k 0 5.6k 0 0 0 0 0 0 0 5.6k S6 S6 VCC-GND S1 S6 VCC-GND S6 S6 S3 S1 VCC-GND VCC-GND S6 S6 S1 GND VCC-GND S6 S6 S1 S6 S6 S6 VCC-GND S6 S6 S1 S1 VCC-GND VCC-GND S6 S6 S1 S6 VCC VCC-GND VCC-GND VCC-GND GND VCC-GND GND GND GND VCC VCC VCC VCC VCC-GND Sheet 18 / 20 PS-AT7909E Rev A 189 190 191 192 193 194 195 196 197 198 199 199 199 200 200 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 177 178 179 180 181 182 183 184 185 186 717 728 707 456 478 465 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 TmeEncClk TmeEnc TmeEnc TmeEncIQClk VSB48 TmeClcwSamp TmeClcwClk TmeClcwD_3_ TmeClcwD_2_ TmeClcwD_1_ VSA44 VSA41 VSA47 VDA46 VDA39 VDA43 TmeClcwD_0_ ReInit CiInClk CiInData VDB45 CiInRdy CiInValid CiOutRdy CiOutClk CiOutData VSB42 CiOutValid SpwEnA SpwSInB SpwDInB SpwIfSel SpwSInA SpwDInA SpwClk VDB40 SpwSOut SpwDOut CpdmClkAlive CpdmClkToggle CpdmClk VSB38 CpdmSer CpdmArmN CpdmStrb CselRmOn CselStsIn_2_ CselStsIn_1_ PO66VF IOut PO33V QOut PO33V PO33V PVSSB PO22V PO22V PICV:PRD6V PICV:PRD6V PICV:PRD6V PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PICV:PRD6V PICSV:PRD6V PICV:PRD6V PICV:PRD6V PVDDVB PO33V PICV:PRD6V PICV:PRD6V PO33V PO33V PVSSB PO33V PO22V PICV PICV PICSV:PRD6V PICV PICV PICV PVDDVB PO33V PO33V PICSV PO33V PO33V PVSSB PO33V PO22V PO22V PICSV:PRD6V PICSV:PRD6V PICSV:PRD6V O/Z O/Z O/Z O/Z VSB O/Z O/Z I I I VSA VSA VSA VDA VDA VDA I I I I VDB O/Z I I O/Z O/Z VSB O/Z O/Z I I I I I I VDB O/Z O/Z I O/Z O/Z O/Z O/Z O/Z I I I PD PD PD PD PD PD PD PD PD PD PD PD PD 5.6k 5.6k 5.6k 5.6k 0 5.6k 5.6k 2.2k 2.2k 2.2k 0 0 0 0 0 0 2.2k 2.2k 2.2k 2.2k 0 5.6k 2.2k 2.2k 5.6k 5.6k 0 5.6k 5.6k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 0 5.6k 5.6k 2.2k 5.6k 5.6k VSB 5.6k 5.6k 5.6k 2.2k 2.2k 2.2k VCC-GND VCC-GND VCC-GND VCC-GND GND VCC-GND VCC-GND S6 S6 S6 GND GND GND VCC VCC VCC S6 S6 S1 S6 VCC-GND VCC-GND S6 S6 VCC-GND VCC-GND GND VCC-GND VCC-GND S6 S6 S6 S1 S6 S1 VCC VCC-GND VCC-GND S6 VCC-GND VCC-GND 0 VCC-GND VCC-GND VCC-GND S6 S6 S6 Sheet 19 / 20 PS-AT7909E Rev A 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 249 249 250 250 250 251 252 253 254 255 256 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 753 762 739 489 501 510 235 236 237 238 239 240 CselStsIn_0_ VDB35 SeqIrq CselStsOut_2_ CselStsOut_1_ CselStsOut_0_ TxBIhb TxAIhb VSB33 DataOutN DataOutP DataInAN MemDcc_5_ MemDcc_4_ VDB31 MemDcc_3_ VSA34 VSA30 VSA37 VDA36 VDA32 VDA29 MemDcc_2_ MemDcc_1_ MemDcc_0_ MemD_15_ MemD_14_ MemD_13_ PICSV:PRD6V PVDDVB PO22V PO22V PO22V PO22V PO22V PO22V PVSSB PO22V PO22V PICSV:PRD6V PICV:PO33V:PRD6V PICV:PO33V:PRD6V PVDDVB PICV:PO33V:PRD6V PVSSA PVSSA PVSSA PVDDA PVDDA PVDDA PICV:PO33V:PRD6V PICV:PO33V:PRD6V PICV:PO33V:PRD6V PICV:PO33V:PRD6V PICV:PO33V:PRD6V PICV:PO33V:PRD6V I VDB O/Z O/Z O/Z O/Z O/Z O/Z VSB O/Z O/Z I I/O I/O VDB I/O VSA VSA VSA VDA VDA VDA I/O I/O I/O I/O I/O I/O PD PD PD PD PD PD PD PD PD PD PD 2.2k 0 5.6k 5.6k 5.6k 5.6k 5.6k 5.6k 0 5.6k 5.6k 2.2k 2.2k 2.2k 0 2.2k 0 0 0 0 0 0 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k S6 VCC VCC-GND VCC-GND VCC-GND VCC-GND VCC-GND VCC-GND GND VCC-GND VCC-GND S1 GND GND VCC GND GND GND GND VCC VCC VCC GND GND GND GND GND GND Sheet 20 / 20 |
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